Workshop04-HPINI

International Workshop on High Performance Interconnection Networks and Interconnects

(HPINI 2016)

CALL FOR PAPERS

http://hpcs2016.cisedu.info or http://cisedu.us/rp/hpcs16

July 18 – July 22, 2016

Innsbruck, Austria

Submission Deadline: April 07, 2016 - Extended

Submissions could be for full papers, short papers, poster papers, or posters

SCOPE AND OBJECTIVES

Computational, storage, accelerators, and sensing resources are required to be interconnected in efficient ways in most complex systems such as data-centre and cloud infrastructures, data centers, cyber physical security systems, many-core processors, HPC and reconfigurable platforms.

This workshop is concerned with the design of high performance interconnection networks and interconnects for such complex systems. Also of interest is to explore systems using HPIN. It is intended to serve as a forum to bring together researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in high performance interconnection networks.

Selected high-quality papers from the workshop will be invited for extension and publication in a special issue in the International Journal Microprocessors and Microsystems.

The HPIN Workshop topics include (but are not limited to) the following:

  • Multi-core on-chip Interconnects, Clusters interconnects, Systems interconnects, and Data centers Interconnects

  • Hardware and software architectures and implementations for interconnection networks

  • On/Off-chip interconnection network architecture (topology, routing, arbitration, ...)

  • (Self-aware) Quality of Service

  • Design, implementation, and evaluation of interconnect standards (InfiniBand, Ethernet, PCI-Express, HyperTransport)

  • Performance and power management issues

  • Asynchronous interconnect designs

  • System modelling and simulation

  • Reliability, scalability, availability, and fault tolerance

  • (Self-aware) reconfigurability issues

  • Memory system design and optimizations

  • Flow control and congestion management

  • Implementing HPIN with FPGAs

  • HPIN in cyber physical systems

  • HPIN in cyber security

  • Application specific HPIN

  • HPIN for data centers

  • Reconfigurable/Programmable interconnect components

  • Impact of the interconnect on application performance

INSTRUCTIONS FOR AUTHORS:

You are invited to submit original and unpublished research works on above and other topics related to high performance interconnection networks and interconnects. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2016.cisedu.info/1-call-for-papers/call-for-posters for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments.

Submit a PDF copy of your full manuscript to the workshop paper submission EasyChair site at https://easychair.org/conferences/?conf=hpini2016. Acknowledgement will be sent within 48 hours of submission.

Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2016 conference to present the paper at the workshop.

Proceedings

Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2016 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE Digital Library and indexed in all major indexing services accordingly.

In addition to the above, a planned special issue of the Journal Concurrency and Computation: Practice and Experience will be available for selected papers of the conference. Best papers will be invited to submit an extended version.

If you have any questions about paper submission or the workshop, please contact the track organizers.

IMPORTANT DATES

Paper Submissions: --------------------------------------- April 07, 2016 - Extended

Acceptance Notification: --------------------------------- April 28, 2016

Camera Ready Papers and Registration Due by: ------ May 21, 2016 - Extended

Conference Dates: --------------------------------------- July 18 – 22, 2016

WORKSHOP ORGANIZERS

Mohamed Bakhouya

International University of Rabat

Technopolis Rabat-Shore, 11100, Sala el Jadida, Morocco

Phone: +212 648 452 702

Email: mohamed.bakhouya@uir.ac.ma

URL: http://mbakhouya.free.fr/

Masoud Daneshtalab

KTH Royal Institute of Technology, Sweden

Phone: +46 87 90 44 09

Email: masdan@kth.se

URL: https://people.kth.se/~masoudd/

INTERNATIONAL PROGRAM COMMITTEE*

All submitted papers will be rigorously reviewed by the workshop International Program Committee members following similar criteria used in HPCS 2016 and will be published as part of the HPCS 2016 Proceedings.

  • Mohamed Riduan Abid, Alakhawayn University in Ifrane, Marocco

  • Nader Bagherzadeh, University of California-Irvine, California, USA

  • Shajulin Benedict, Anna University, India

  • Eugen Dedu, University of Franche-Comté, France

  • Klaus Hofmann, Darmstadt University of Technology, Germany

  • Miaoqing Huang, University of Arkansas, Arkansas, USA

  • Farshad Khunjush, Shiraz University, Iran

  • Teng Li, George Washington University, D.C., USA

  • Pascal Lorenz, University of Haute Alsace, France

  • Mehdi Modarressi, Tehran University, Iran

  • Vikram Narayana, George Washington University, D.C., USA

  • Maurizio Palesi, Kore University, Italy

  • Sven-Arne Reinemo, Simula Research Laboratory, Norway

  • Suboh Suboh, University of Central Florida, Florida, USA

  • Xiaohang Wang, Guangzhou Institute of Advanced Technology, China

  • Khalid Zinedine, Université Chouaib Doukkali (UCD)/FS, Morocco

For information or questions about Conference's paper submission, tutorials, posters, workshops, special sessions, exhibits, demos, panels and forums organization, doctoral colloquium, and any other information about the conference location, registration, paper formatting, etc., please consult the Conference’s web site at URL: http://hpcs2016.cisedu.info/ or http://cisedu.us/rp/hpcs16 or contact one of the Conference's organizers.

As part of

The International Conference on High Performance Computing & Simulation (HPCS 2016)